Demultiplexer

A demultiplexer (demux) is the reverse of a Multiplexer: it takes a single data input and routes it to one of several outputs, picked by select bits. With $n$ select bits, a demux has $2^n$ data outputs — one of them carries the input value, the rest are $0$.

Bit-ordering convention used here. Select bits are numbered with the least significant bit first: $s_0$ is the LSB, $s_1$ is the next bit, and so on up to $s_{n-1}$ as the MSB. The output index is interpreted as $s_{n-1}\cdots s_1{s}_0$ in standard binary, so for example $s_1{s}_0=10$ means $s_1=1,s_0=0$, which addresses output $y_2$. Some textbooks use the opposite convention (MSB-first numbering); the underlying logic is the same, only the subscripts change.

A 1-to-4 demux with select inputs $s_1,s_0$ and data input $D$ outputs:

• $y_0=\overline{s_1}\overline{s_0}\cdot D$
• $y_1=\overline{s_1}{s}_0\cdot D$
• $y_2=s_1\overline{s_0}\cdot D$
• $y_3=s_1{s}_0\cdot D$

When $D=1$, exactly one output is $1$ — whichever the select bits picked. When $D=0$, all outputs are $0$.

Built from a decoder

A Decoder with an enable input is a demultiplexer. Feed the data input $D$ into the enable, and the select bits into the address inputs:

• If $D=1$, the decoder behaves normally — the addressed output goes high.
• If $D=0$, the decoder is disabled — all outputs go low.

So instead of building separate demux hardware, you reuse a decoder with the data line wired into its enable. This is why textbook diagrams often label the same circuit as either “decoder” or “demultiplexer” depending on which interpretation you want.

Where demuxes are used

• Buses. A single source needs to drive one of several destinations — the demux selects which destination is active.
• Serial-to-parallel conversion. A serial data stream plus a counting selector routes successive bits to successive parallel outputs.
• Memory writes. The address selects which memory location to write; the data line provides the value. (Often this is decoder + write enable, structurally similar.)

A demux + a MUX in series is one way to implement a fully connected switch fabric: each input can route to any output. Bigger versions of this are how telephone exchanges and packet routers are organized.

Truth table for 1-to-4 demux

For data input $D$ and select bits $s_1{s}_0$:

$s_1$	$s_0$	$y_0$	$y_1$	$y_2$	$y_3$
0	0	$D$	0	0	0
0	1	0	$D$	0	0
1	0	0	0	$D$	0
1	1	0	0	0	$D$

Whichever output the select bits address gets the value of $D$; all others are forced to 0.

Worked example: 1-to-8 demux

For 8 outputs, you need 3 select bits. Build it from a 3-to-8 decoder with $D$ wired into its enable:

• Decoder gets address $s_2{s}_1{s}_0$ — picks one of 8 lines.
• Enable input takes $D$.
• When $D=1$: the addressed output is 1, others are 0.
• When $D=0$: all outputs are 0.

This pattern — decoder + enable as a demux — is so universal that “1-to-N demux” and “N-line decoder with enable” are often used interchangeably.

Multi-bit demuxes

The demuxes above route a single bit. To route multi-bit data (a whole word), you need parallel demuxes — one per data bit, all sharing the same select lines.

For example, a 1-to-4 demux of 8-bit words = eight 1-to-4 single-bit demuxes in parallel. The 8 data bits are mirrored across the demuxes; one of the four 8-bit output buses carries the input data, the others carry 0.

In hardware, this is built as a single block with appropriately replicated logic. The select lines are shared.

Demux in actual systems

Demuxes show up everywhere in real systems:

• Address decoding in microcontrollers: the address bus’s high bits select which peripheral is being accessed. The decoder is essentially a demux directing the data line to the chosen peripheral.

• Display multiplexing: in 7-segment displays driven by a single set of segment lines, a demux + counter cycles through the digits, lighting one at a time. Persistence of vision makes them appear continuous.

• Time-division multiplexing (TDM): in communication systems, a demux at the receiver routes time-slot data to the appropriate channel.

• Routing in network switches: each packet’s destination address selects an output port via demux logic.

The conceptual “one signal, many possible destinations” is everywhere data flows.