The radix complement of an -digit number in base is
The number you’d add to to get the smallest power of greater than . The diminished radix complement is one less:
These two complement operations are the foundation of subtraction-by-addition in digital hardware. Radix complement in base 2 is 2’s complement; in base 10 it’s 10’s complement. The diminished forms are 1’s complement and 9’s complement respectively.
Why two flavors
The diminished radix complement is easier to compute by hand. Since is the digit repeated times (in base 10, that’s ; in base 2, ), the diminished complement is just “complement each digit against ” — subtract each digit from independently, no borrows.
In binary that means flip every bit. In decimal that means for each digit. Trivial.
The full radix complement is then “diminished radix complement plus one”:
Easier than computing directly.
Examples
Finding 10’s complement of 873.
Diminished (9’s) complement: .
Add 1: .
Check: . ✓
Finding 2’s complement of 01110011.
Diminished (1’s) complement: invert every bit → .
Add 1: .
That’s the 2’s complement representation of in 8 bits (since ).
Subtraction by addition
The killer application. The standard procedure (the one this note uses throughout): to compute for minuend and subtrahend ,
- Take the diminished radix complement of (the subtrahend).
- Add it to .
- If a carry-out leaves the high digit, the result is positive — apply end-around carry (add the carry-out back into the low digit) to get the answer.
- If there is no carry-out, the result is negative — take the diminished radix complement of the sum and prefix a minus sign.
This is the form that maps directly onto digital adder hardware: feed through inverters, set the carry-in to for diminished or for full radix complement, and read out the result. See 2’s Complement Arithmetic for the binary version using XOR gates.
Worked subtraction examples
Base 10, positive result: .
9’s complement of subtrahend is . Add to minuend : . The leading 1 is the carry-out — apply end-around carry: . Result: . ✓
Base 10, negative result: .
9’s complement of subtrahend is (working in 2 digits to match the minuend’s width). Add to minuend : . No carry-out, so the result is negative: take 9’s complement of , which is , and prefix a minus sign: . ✓
Base 2, positive result: .
Standard binary procedure: take the 1’s complement of the subtrahend and add it to the minuend, then apply end-around carry.
1’s complement of subtrahend is .
Add to minuend: (a 9-bit sum with a carry-out of 1).
End-around carry — add the carry-out back into the low end: .
Result: . Decimal check: . ✓
Base 2, negative result: .
1’s complement of the subtrahend is .
Add to minuend: (no carry-out, so no end-around carry).
The absence of end-around carry signals a negative result. Take the 1’s complement of the sum and prefix a minus: . Decimal check: . ✓
Why bother
Doing subtraction directly in hardware would require a separate “subtractor” circuit. Doing it by complement-and-add reuses an adder you already have. That’s a huge silicon savings — the entire CPU integer ALU uses the same adder for both ops, with one extra XOR gate row to optionally invert. For decimal it’s the same idea (using 9’s/10’s complement) — used historically in mechanical and tube calculators where a ten-input adder was much simpler than a ten-input subtractor.