The input bias current is the small DC current a real op-amp actually draws into each input terminal, violating golden rule 1 of the Ideal op-amp model (which says zero). The internal input transistors need some DC base or gate current to be biased, and that current comes in through the external circuit. Typical magnitudes: tens of nanoamperes for a bipolar 741, down to picoamperes for a FET-input device. One of the DC Real op-amp imperfections, alongside Input offset voltage.
Why a tiny current causes a DC error
A bias current is harmless until it flows through a resistance, then Ohm’s law turns it into a voltage. Each input current flows through the DC resistance seen looking out of that input (source resistance, feedback network) and drops volts. That spurious DC voltage sits right at the input and gets amplified by the Closed-loop gain like any signal, producing an output DC error. For a 741 with flowing through a source resistance, the error is at the input. Large.
The cancellation trick
The two input bias currents and are almost equal (same internal transistor pair). Exploit that: make the DC resistance seen from the non-inverting input equal to the DC resistance seen from the inverting input. Then the two nearly-equal bias currents drop nearly-equal voltages on the two inputs, so both inputs sit at the same DC level, and since the op-amp responds only to the difference, a common shift cancels. For an inverting/non-inverting stage you add a resistor in series with the non-inverting input equal to (the resistance the inverting node sees), instead of grounding it directly.
The cancellation isn’t perfect because exactly. What survives is set by the input offset current
the difference of the two bias currents, typically an order of magnitude smaller than itself. So the matching trick replaces a error with a much smaller error. For the lowest DC error, also keep feedback resistances small and, where the budget allows, use a FET-input op-amp whose is picoamps to begin with.