MOSFET output resistance

The MOSFET output resistance $r_o$ is the small-signal resistance seen looking into the drain of a saturated MOSFET. It exists because the saturation current is not perfectly flat with $V_{DS}$ — it rises slightly, by Channel-length modulation — so the device behaves as a non-ideal current source with a finite slope.

Definition and value

$r_o$ is the inverse slope of the saturation output characteristic at the operating point:

$r_o={\frac{\partial v_{DS}}{\partial i_D}|}_Q=\frac{1}{\lambda I_D}=\frac{V_A}{I_D}$

Derive it directly from the modified square-law $i_D=\frac{1}{2}{k}_n{V}_{OV}^2(1+\lambda v_{DS})$. Differentiate with respect to $v_{DS}$ at fixed $V_{GS}$ (so $V_{OV}$ is held constant):

$\frac{\partial i_D}{\partial v_{DS}}=\frac{1}{2}{k}_n{V}_{OV}^2\cdot \lambda \approx \lambda I_D$

since $\frac{1}{2}{k}_n{V}_{OV}^2\approx I_D$ at the bias point. Inverting gives $r_o=1/(\lambda I_D)=V_A/I_D$, where $\lambda$ is the Channel-length modulation parameter, $V_A=1/\lambda$ is the Early voltage, and $I_D$ is the DC drain current. The output resistance is inversely proportional to bias current: run the device at less current and $r_o$ goes up.

Typical numbers: with $V_A\approx 20$–$100\text{V}$ and $I_D$ around $0.1$–$1\text{mA}$, $r_o$ lands in the hundreds of kΩ.

Why it caps the gain

In the MOSFET small-signal model (hybrid-π form), $r_o$ appears in parallel with the drain-source current source $g_m{v}_{gs}$. So in a Common-source amplifier the AC load on the drain is not just the external $R_D$ but $R_D\parallel r_o$, and the gain becomes

$A_v=-g_m(R_D\parallel r_o)$

If you try to push gain up by making $R_D$ huge, $r_o$ eventually dominates the parallel combination and the gain ceilings out at $-g_m{r}_o$ — the device’s intrinsic gain. That intrinsic limit is why a larger Early voltage (flatter curves, bigger $r_o$) is desirable, and why high-gain stages use tricks like the cascode to boost the effective output resistance beyond a single device’s $r_o$.