Sum-of-products

A sum-of-products (SOP) expression is an OR of AND terms — products are summed. It directly maps onto a two-level circuit: a layer of AND gates feeding a single OR gate.

The canonical SOP form lists every minterm where $f=1$:

$f=\sum m(i_1,i_2,\dots )$

For example, $f(x_1,x_2,x_3)$ that’s $1$ on rows $0,2,4,5,6$ has canonical SOP

$f=\overline{x_1}\overline{x_2}\overline{x_3}+\overline{x_1}{x}_2\overline{x_3}+x_1\overline{x_2}\overline{x_3}+x_1\overline{x_2}{x}_3+x_1{x}_2\overline{x_3}$

Five three-input ANDs and a five-input OR. Buildable, but huge.

The point of SOP is that it’s the most direct route from a truth table to a circuit. Once you have it, simplify — typically with a Karnaugh Map — to get a minimum-cost SOP that uses fewer literals and fewer gates while computing the same function.

A minimal SOP doesn’t have to use full minterms. After simplification a term might collapse to just $x_1\overline{x_3}$, which still represents an AND term but covers multiple minterms (here, all rows where $x_1=1$ and $x_3=0$, regardless of $x_2$).

SOP pairs with POS. Either form represents the same function; pick whichever leads to fewer gates after minimization. Typically: if the truth table has fewer $1$s than $0$s, SOP wins; otherwise POS does.

In hardware terms an SOP circuit has two levels of gates after the inputs (one level of NOTs to make the complemented literals, then ANDs, then an OR). Two-level circuits have predictable propagation delay — every output path passes through exactly two gates of logic. See Multilevel synthesis for when it’s worth trading that off for more levels with smaller gates.